Power-Efficient High-Speed Parallel-Sampling ADCs for by Yu Lin, Hans Hegt, Kostas Doris, Arthur H.M. van Roermund

By Yu Lin, Hans Hegt, Kostas Doris, Arthur H.M. van Roermund

This ebook addresses the demanding situations of designing excessive functionality analog-to-digital converters (ADCs) according to the “smart information converters” thought, which suggests context know-how, on-chip intelligence and version. Readers will learn how to make the most numerous details both a-priori or a-posteriori (obtained from units, signs, purposes or the ambient events, etc.) for circuit and structure optimization through the layout part or variation in the course of operation, to augment information converters functionality, flexibility, robustness and power-efficiency. The authors specialise in exploiting the a-priori wisdom of the system/application to boost enhancement innovations for ADCs, with specific emphasis on bettering the facility potency of high-speed and high-resolution ADCs for broadband multi-carrier structures.

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Extra resources for Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems

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A similar ADC architecture using multiple ADCs in parallel was also proposed in [31] for the purpose of relaxing the ADC resolution requirements when used in a broadband communication system. As identified in this reference this concept can be used to improve both the dynamic range and SNDR of an ADC for converting broadband signals. In [32], another ADC architecture, composed of multiple ADCs in parallel to process the same input signal, was presented, but it is based on a different concept compared to the one mentioned above.

1. 2 describes the amplitude properties of multicarrier signals, especially their large peak-to-average ratio. A discussion of the ADC dynamic range requirement for a multi-carrier system is given in Sect. 3. 4 reviews power reduction techniques to enhance the SNR of noise limited ADCs in advanced CMOS technologies. 5 presents a parallelsampling architecture for ADCs to convert multi-carrier signals efficiently by exploiting their amplitude statistical properties. ADCs with this architecture are able to have a larger input signal range without causing excessive distortion while showing an improved accuracy over the small amplitudes that have much higher probability of occurrence due to the multi-carrier signal amplitude properties.

In this way, the ADC takes advantage of both a priori and a posteriori information of the signal. 7 Conclusions In this chapter, broadband multi-carrier transmission was briefly introduced. Statistical amplitude properties of the multi-carrier signal and the ADC’s dynamic range requirement for multi-carrier systems were analyzed. The tradeoff between power consumption and SNR of thermal noise limited ADCs was discussed. Power reduction techniques at circuit and architecture level for thermal noise limited 48 3 Parallel-Sampling ADC Architecture for Multi-carrier Signals ADCs in advanced CMOS technologies were studied and summarized.

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